C Clock Control Register (Iccr0) - Fujitsu F2MC-8FX Hardware Manual

2
CHAPTER 22 I C
2
22.5.5 I

C Clock Control Register (ICCR0)

The ICCR0 register is used to enable I
2
I C Clock Control Register (ICCR0)
bit7
Address
DMBP
0065 ICCR0
H
R/W
R/W : Readable/writable (Read value is the same as write value)
R0/WX : Undefined bit
(Read value is "0", writting has no effect on operation)
- : Unused
: Initial value
390
2
Figure 22.5-7 I C Clock Control Register (ICCR0)
bit6 bit5 bit4 bit3
EN CS4 CS3
-
R0/WX R/W R/W R/W
2
C operation and select the shift clock frequency.
bit2 bit1 bit0
CS2 CS1 CS0
R/W R/W R/W
CS2 CS1 CS0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
CS4 CS3
0 0
0 1
1 0
1 1
EN
0
1
DMBP
0
1
Initial value
00000000
B
Clock-2 select bits (Divider n)
4
8
22
38
98
128
256
512
Clock-1 select bits (Divider m)
5
6
7
8
2
I C operation enable bit
2
Disables I C operation.
2
Enables I C operation.
Divider-m bypass bit
Disables bypassing.
Bypasses divider m.