Fujitsu F2MC-8FX Hardware Manual page 230

CHAPTER 14 WATCH COUNTER
Note:
When the operation is reactivated by WCSR:ISEL=0 after counter stop, please reactivate after
confirming reading WCSR:CTR[5:0] twice, and clearing to CTR[5:0]=000000
Operation in Sub Stop Mode
When the device enters the sub stop mode, the watch counter stops the count operation and the watch
prescaler is also cleared. Therefore, the watch counter cannot count the correct value after the sub stop mode
is cancelled. After the sub stop mode is cancelled, the ISEL bit must always be set to "0" to clear the counter
before use. In any standby mode other than the sub stop mode, the watch counter continues to operate.
Operation at the Main Stop Mode
The interrupt is not generated though the clock counter continues the count operation when entering the
main stop mode. Moreover, the clock counter stops, too, when subclock oscillation stop bit (SYCC: SUBS)
of the system clock control register is set to "1".
Setup Procedure Example
The watch counter is set up in the following procedure:
Initial setup
1) Set the interrupt level.
2) Select the count clock.
3) Set the counter reload value.
4) Activate the watch counter and enable interrupts. (WCDR:ISEL = 1)
Interrupt processing
1) Clear the interrupt request flag.
2) Process any interrupt.
216
(ILR5)
(WCDR:CS1, CS0)
(WCDR:RCTR5 to 0)
(WCSR:WCFLG = 0)
.
B