Overview Of Watchdog Timer - Fujitsu F2MC-8FX Hardware Manual

CHAPTER 11 WATCHDOG TIMER
11.1

Overview of Watchdog Timer

The watchdog timer serves as a counter used to prevent programs from running out of
control.
Watchdog Timer Function
The watchdog timer functions as a counter used to prevent programs from running out of control. Once the
watchdog timer is activated, its counter needs to be cleared at specified intervals regularly. A watchdog
reset is generated if the timer is not cleared within a certain amount of time due to a problem such as the
program entering an infinite loop.
The output of either the timebase timer or watch prescaler can be selected as the count clock for the
watchdog timer.
The interval times of the watchdog timer are shown in Table 11.1-1. If the counter of the watchdog timer is
not cleared, a watchdog reset is generated between the minimum time and the maximum time. Clear the
counter of the watchdog timer within the minimum time.
Table 11.1-1 Interval Times of Watchdog Timer
(Subclock = 32.768kHz)
*: WDTC:CS1, 0: Count clock switch bit of watchdog timer control register
172
Count clock type
Timebase timer output
(main clock = 4MHz)
Watch prescaler output
For information about the minimum and maximum times of the watchdog timer interval,
refer to "11.4 Explanation of Watchdog Timer Operations and Setup Procedure Example".
Count clock switch bit
(WDTC:CS1, 0)*
00
01
10
11
Interval time
Minimum time Maximum time
524 ms 1.05 s
262 ms 524 ms
500 ms 1.00 s
250 ms 500 ms