Operations Of Lcd Controller - Fujitsu F2MC-8FX Hardware Manual

24.6

Operations of LCD Controller

This section describes the operations of the LCD controller.
Operations of LCD Controller
Figure 24.6-1 shows the settings required for LCD display.
LCDCC
LCDCE1
LCDCE2
LCDCE3
LCDCE4
LCDCE5
LCDCB1
LCDCB2
Display RAM
• When the selected frame period generation clock is oscillating with the settings made as in
Figure 24.6-1, the LCD controller outputs the LCD panel drive waveform to the common and
segment output pins (COM0 to COM3, SEG0 to SEG23, SEG28 to SEG31) according to the
contents of display RAM and the LCDC register settings.
• The LCD output pins are selected according to LCDCE1 to LCDCE5. The pins not selected as
LCD outputs are used as general-purpose I/O ports.
• The frame period generation clock can be changed even during LCD display operation. As the
display may flicker when it is changed, however, you should always turn off the display
temporarily, for example, using the blanking (LCDCC:BK = 1) function in advance.
• The display drive output is a 2-frame alternating waveform selected by bias and duty settings.
• The COM2 and COM3 pin outputs in 1/2 duty mode and the COM3 pin output in 1/3 duty
mode can be used to output the deselected level waveform or as I/O ports.
Figure 24.6-1 LCD Controller Settings
bit7 bit6 bit5
CSS LCDEN VSEL
PICTL BLSEL -
SEG07 SEG06 SEG05
SEG15 SEG14 SEG13
SEG23 SEG22 SEG21
SEG31 SEG30 SEG29
S1C3 S1C2 S1C1
S3C3 S3C2 S3C1
CHAPTER 24 LCD CONTROLLER
bit4 bit3 bit2
BK MS1 MS0
Other than 00
VE1 COM3 COM2
SEG04 SEG03 SEG02
SEG12 SEG11 SEG10
SEG20 SEG19 SEG18
SEG28 - -
S1C0 S0C3 S0C2
S3C0 S2C3 S2C2
Display data
bit1 bit0
FP1 FP0
COM1 COM0
SEG01 SEG00
SEG09 SEG08
SEG17 SEG16
- -
S0C1 S0C0
S2C1 S2C0
453