Fujitsu F2MC-8FX Hardware Manual page 47

Temporary accumulator (T)
The temporary accumulator is an auxiliary 16-bit register for arithmetic operation. It is used to perform
arithmetic operations with the data in the accumulator (A). The data in the temporary accumulator is
handled as word data for word-length (16-bit) operations with the accumulator (A) and as byte data for
byte-length (8-bit) operations. For byte-length operations, only the lower eight bits (TL) of the temporary
accumulator are used and the upper eight bits (TH) are not used.
When a MOV instruction is used to transfer data to the accumulator (A), the previous contents of the
accumulator are automatically transferred to the temporary accumulator. When transferring byte-length
data, the upper eight bits (TH) of the temporary accumulator remain unchanged. The initial value after a
reset is 0000 .
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Index register (IX)
The index register is a 16-bit register used to hold the index address. The index register is used with a
single-byte offset (-128 to +127). The offset value is added to the index address to generate the memory
address for data access. The initial value after a reset is 0000
Extra pointer (EP)
The extra pointer is a 16-bit register which contains the value indicating the memory address for data
access. The initial value after a reset is 0000
Stack pointer (SP)
The stack pointer is a 16-bit register which holds the address referenced when an interrupt or subroutine
call occurs and by the stack push and pop instructions. During program execution, the value of the stack
pointer indicates the address of the most recent data pushed onto the stack. The initial value after a reset is
0000 .
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Program status (PS)
The program status is a 16-bit control register. The upper eight bits make up the register bank pointer (RP)
and direct bank pointer (DP); the lower eight bits make up the condition code register (CCR).
In the upper eight bits, the upper five bits make up the register bank pointer used to contain the address of
the general-purpose register bank. The lower three bits make up the direct bank pointer which locates the
area to be accessed at high speed by direct addressing.
The lower eight bits make up the condition code register (CCR) which consists of flags that represent the
state of the CPU.
The instructions that can access the program status are MOVW A,PS or MOVW PS,A. The register bank
pointer (RP) and direct bank pointer (DP) in the program status register can also be read from or written to
by accessing the mirror address (0078
Note that the condition code register (CCR) is part of the program status register and cannot be accessed
independently.
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Refer to the "F MC-8FX Programming Manual" for details on using the dedicated registers.
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CHAPTER 5 CPU
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