Block Diagram of Port 5
Peripheral function input
Peripheral function input enable
Peripheral function output enable
Peripheral function output
PDR read
PDR write
In bit operation instruction
DDR read
DDR write
ILSR read
ILSR write
ILSR2 read
ILSR2 write
Figure 9.5-1 Block Diagram of Port 5
0
1
1
PDR
0
DDR
Stop, Watch (SPL=1)
ILSR
ILSR2
Automotive
Hysteresis
CMOS
CMOS input level select
Hysteresis input level select
Automotive input level select
CHAPTER 9 I/O PORT
Pin
OD
121