Wild Register Data Setup Registers (Wrdr0 To Wrdr2) - Fujitsu F2MC-8FX Hardware Manual

15.3.1

Wild Register Data Setup Registers (WRDR0 to WRDR2)

The wild register data setup registers (WRDR0 to WRDR2) use the wild register function
to specify the data to be amended.
Wild Register Data Setup Registers (WRDR0 to WRDR2)
Figure 15.3-2 Wild Register Data Setup Registers (WRDR0 to WRDR2)
WRDR0
Address
0F82
H
WRDR1
Address
0F85
H
WRDR2
Address
0F88
H
R/W: Readable/writable (Read value is the same as write value)
Table 15.3-2 Functional Description of Each Bit of Wild Register Data Setup Resister (WRDR)
Bit name
RD7, RD6, RD5, RD4,
bit7
RD3, RD2, RD1, RD0:
to
Wild register data
bit0
setup bits
bit7 bit6 bit5
RD7 RD6 RD5 RD4
R/W R/W R/W R/W
bit7 bit6 bit5
RD7 RD6 RD5 RD4
R/W R/W R/W R/W
bit7 bit6 bit5
RD7 RD6 RD5 RD4
R/W R/W R/W R/W
These bits specify the data to be amended by the wild register function.
• These bits are used to set the amendment data at the address assigned by the wild register address
setup register (WRAR). Data is enabled at the address corresponding to each wild register number.
• Read access of these bits is enabled only when the corresponding data test setting bit in the wild
register data test setup register (WROR) is set to "1".
bit4 bit3 bit2 bit1
RD3 RD2 RD1
R/W R/W R/W
bit4 bit3 bit2 bit1
RD3 RD2 RD1
R/W R/W R/W
bit4 bit3 bit2 bit1
RD3 RD2 RD1
R/W R/W R/W
Function
CHAPTER 15 WILD REGISTER
bit0 Initial value
RD0 00000000
B
R/W
bit0 Initial value
RD0 00000000
B
R/W
bit0 Initial value
RD0 00000000
B
R/W
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