Wild Register Data Test Setup Register (Wror) - Fujitsu F2MC-8FX Hardware Manual

CHAPTER 15 WILD REGISTER
15.3.4

Wild Register Data Test Setup Register (WROR)

The wild register data test setup register (WROR) enables/disables reading from the
corresponding wild register data setup register (WRDR0 to WRDR2).
Wild Register Data Test Setup Register (WROR)
Address
0077
H
R0/WX : Undefined bit (Read value is "0", writing has no effect on operation)
R0/W0 : Reserved bit (Write value is "0", read value is "0")
R/W : Readable/writable (Read value is the same as write value)
-: Not used
Table 15.3-5 Functional Description of Wild Register Data Test Setup Register (WROR)
Bit name
bit7
Unused bits
bit6
bit5
to Reserved bits
bit3
bit2 DRR2, DRR1, DRR0:
to Wild register data test
bit0 setting bits
228
Figure 15.3-5 Wild Register Data Test Setup Register (WROR)
bit7 bit6 bit5
- -
Reserved
R0/WX R0/WX R0/W0
These bits are not used.
• The read value is "0".
• Write has no effect on operation.
These bits are reserved.
• The read value is "0".
• Always set "0".
These bits enable/disable the normal reading from the corresponding data setup register of the wild
register.
• DRR0 enables/disables reading from the wild register data setup register (WRDR0).
• DRR1 enables/disables reading from the wild register data setup register (WRDR1).
• DRR2 enables/disables reading from the wild register data setup register (WRDR2).
When set to "0" : disable reading.
When set to "1" : enable reading.
bit4 bit3 bit2
DRR2 DRR1 DRR0
Reserved Reserved
R0/W0 R0/W0 R/W
Function
bit1 bit0 Initial value
00000000
R/W R/W
B