Toshiba TLCS-900/H1 Series Manual page 102

PJ Bit symbol
(004CH)
Read/Write
Reset State
PJCR Bit symbol
(004EH)
Read/Write
Reset State
Function
PJFC Bit symbol PJ7F
(004FH)
Read/Write
Reset State
Function
0: Port
1: SDCKE
PJDR Bit symbol PJ7D
(0093H)
Read/Write
Reset State
Function
Note: Read-modify-write is prohibited for the registers PJCR and PJFC.
Port J Register
7 6 5
PJ7 PJ6 PJ5
Data from external port
1
(Output latch register is set
to "1")
Port J Control Register
7 6 5
PJ6C PJ5C
W
0 0
0: Input 1: Output
Port J Function Register
7 6 5
PJ6F PJ5F
0 0 0
0: Port 0: Port
1: NDCLE at 1: NDALE at
<PJ6> = 0, <PJ5> = 0,
SDUUDQM SDULDQM
at at
<PJ6> = 1 <PJ5> = 1
Port J Drive Register
7 6 5
PJ6D PJ5D
1 1 1
Input/Output buffer drive register for standby mode
Figure 3.5.40 Register for Port J
92CH21-100
4 3
PJ4 PJ3
R/W
1 1
4 3
4 3
PJ4F PJ3F
W
0 0
0: Port 0: Port 0: Port
1: SDLUDQM 1: SDLLDQM 1
:
4 3
PJ4D PJ3D
R/W
1 1
TMP92CH21
2 1
PJ2 PJ1 PJ0
1 1
2 1
2 1
PJ2F PJ1F PJ0F
0 0
0: Port 0: Port
SDWE 1 SDCAS 1 SRRAS
, : , :
SDWR SRLUB SRLLB
2 1
PJ2D PJ1D PJ0D
1 1
2009-06-19
0
1
0
0
0
,
0
1