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Toshiba TLCS-900/H1 Series Manual page 508

Original cmos 32-bit microcontroller
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(2) Interrupt control (3/4)
Symbol
Name
Address
INT0 &
INTE0AD
INTAD
00F0H
enable
INTTC0 &
INTETC01
INTTC1
00F1H
enable
INTTC2 &
INTETC23
INTTC3
00F2H
enable
INTTC4 &
INTETC45
INTTC5
00F3H
enable
INTTC6 &
INTETC67
INTTC7
00F4H
enable
SIO
00F5H
interrupt
SIMC
(Prohibit
mode
RMW)
control
Interrupt
00F6H
IIMC
input mode
(Prohibit
control
RMW)
INTWD
INTWDT
00F7H
enable
00F8H
Interrupt
INTCLR
(Prohibit
clear control
RMW)
7
6
5
INTAD
IADC
IADM2
IADM1
R
R/W
0
0
0
INTTC1 (DMA1)
ITC1C
ITC1M2
ITC1M1
R
R/W
0
0
0
INTTC3 (DMA3)
ITC3C
ITC3M2
ITC3M1
R
R/W
0
0
0
INTTC5 (DMA5)
ITC5C
ITC5M2
ITC5M1
R
R/W
0
0
0
INTTC7 (DMA7)
ITC7C
ITC7M2
ITC7M1
R
R/W
0
0
0
W
0
Always
write "0".
I5EDGE
I4EDGE
I3EDGE
0
0
0
INT5
INT4
INT3
edge
edge
edge
0: Rising
0: Rising
0: Rising
1: Falling
1: Falling
1: Falling
Always write "0"
CLRV7
CLRV6
CLRV5
0
0
0
92CH21-506
4
3
IADM0
I0C
I0M2
R
0
0
INTTC0 (DMA0)
ITC1M0
ITC0C
ITC0M2
R
0
0
INTTC2 (DMA2)
ITC3M0
ITC2C
ITC2M2
R
0
0
INTTC4 (DMA4)
ITC5M0
ITC4C
ITC4M2
R
0
0
INTTC6 (DMA6)
ITC7M0
ITC6C
ITC6M2
R
0
0
I2EDGE
I1EDGE
I0EDGE
W
0
0
INT2
INT1
INT0
edge
edge
edge
0: Rising
0: Rising
0: Rising
1: Falling
1: Falling
1: Falling
ITCWD
R
0
CLRV4
CLRV3
CLRV2
W
0
0
Interrupt vector
TMP92CH21
2
1
0
INT0
I0M1
I0M0
R/W
0
0
0
ITC0M1
ITC0M0
R/W
0
0
0
ITC2M1
ITC2M0
R/W
0
0
0
ITC4M1
ITC4M0
R/W
0
0
0
ITC6M1
ITC6M0
R/W
0
0
0
IR1LE
IR0LE
W
W
1
1
0: INTRX1
0: INTRX0
edge
edge
mode
mode
1: INTRX1
1: INTRX0
level
level
mode
mode
I0LE
R/W
0
0
0
0: INT0
Always
edge
write "0".
mode
1:INT0
level
mode
INTWD
CLRV1
CLRV0
0
0
0
2009-06-19

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