Toshiba TLCS-900/H1 Series Manual page 232

3.10.3.27 USBREADY Register
USBREADY
bit Symbol
(07E6H)
Read/Write
Reset State
USBREADY (Bit0)
0: Writing to descriptor RAM has finished.
1: Writing to descriptor RAM is enabled.
(However, writing to descriptor RAM is prohibited when connected to host.)
VDD
INTXX
PortXX
(Pull-up on/off)
Write signal
case, UDC disable detecting USB_RESET signal until USBREADY register is written
"0" after release of USB_RESET.
resistor is connected to host in OFF condition, this condition is equivalent condition
with USB_RESET signal by pull-down resistor on the host side. Therefore UDC is not
detected in USB_RESET until "0" is written to USBREADY register
Note1: External pull-up resistor and control switch are needed with the TMP92CH21.
Note2: The above setting is an example for communication. A specific circuit is required to prevent current flow at
connector detection , no-use, and no connection.
This register informs finishing writing data to descriptor RAM on UDC.
After assigned data to descriptor RAM, write "0" to bit0.
7 6
USB host
GND
15 kΩ
15 kΩ
Detect level of VDD signal from USB cable, and execute initialize sequence. In this
If the pull-up resistor on D+ signal is controlled by control signal, when pull-up
5 4
R1 = 1.5 kΩ
R2
R3
Descriptor RAM access
Device ID RAM
Register in USB
92CH21-230
TMP92CH21
3 2 1
TMP92CH21
VCC
VSS
CPU
PortXX
D+
UDC
D−
USBREADY registera access
0
USBREADY
R/W
0
2009-06-19