Toshiba TLCS-900/H1 Series Manual page 55

(1) Interrupt level setting registers
Symbol Name Address
INT0
&
INTE0AD
INTAD
enable
INT1
&
INTE12
INT2
enable
INT3
&
INTE34
INT4
enable
INT5
&
INTE5I2S
INTI2S
enable
INTTA0
&
INTETA01
INTTA1
enable
INTTA2
&
INTETA23
INTTA3
enable
INTTB0
&
INTETB01
INTTB1
enable
INTTBO0
(Overflow)
INTETBO0
enable
INTRX0
&
INTES0
INTTX0
enable
INTRX1
&
INTES1
INTTX1
enable
INTUSB
INTEUSB
enable
INTALM0 &
INTALM1
INTEALM01
enable
INTALM2 &
INTALM3
INTEALM23
enable
7 6
IADC IADM2
F0H
R
0 0
I2C I2M2
D0H
R
0 0
I4C I4M2
D1H
R
0 0
INTI2S
II2SC II2SM2
EBH
R
0 0
INTTA1 (TMRA 1)
ITA1C ITA1M2
D4H
R
0 0
INTTA3 (TMRA 3)
ITA3C ITA3M2
D5H
R
0 0
INTTB1 (TMRA 4)
ITB1C ITB1M2
D8H
R
0 0
− −
DAH
Note: Always write 0
INTTX0
ITX0C ITX0M2
DBH
R
0 0
INTTX1
ITX1C ITX1M2
DCH
R
0 0
− −
E3H
Note: Always write 0
INTALM1
IA1C IA1M2
E5H
R
0 0
INTALM3
IA3C IA3M2
E6H
R
0 0
92CH21-53
5 4
INTAD
IADM1 IADM0
R/W
0 0
INT2
I2M1 I2M0
R/W
0 0
INT4
I4M1 I4M0
R/W
0 0
II2SM1 II2SM0
R/W
0 0
ITA1M1 ITA1M0
R/W
0 0
ITA3M1 ITA3M0
R/W
0 0
ITB1M1 ITB1M0
R/W
0 0
−
− −
ITX0M1 ITX0M0
R/W
0 0
ITX1M1 ITX1M0
R/W
0 0
−
− −
IA1M1 IA1M0
R/W
0 0
IA3M1 IA3M0
R/W
0 0
TMP92CH21
3 2 1
INT0
I0C I0M2 I0M1
R R/W
0 0 0
INT1
I1C I1M2 I1M1
R R/W
0 0 0
INT3
I3C I3M2 I3M1
R R/W
0 0 0
INT5
I5C I5M2 I5M1
R R/W
0 0 0
INTTA0 (TMRA 0)
ITA0C ITA0M2 ITA0M1
R R/W
0 0 0
INTTA2 (TMRA 2)
ITA2C ITA2M2 ITA2M1
R R/W
0 0 0
INTTB0 (TMRA 4)
ITB0C ITB0M2 ITB0M1
R R/W
0 0 0
INTTBO0
ITBO0C ITBO0M2 ITBO0M1
R R/W
0 0 0
INTRX0
IRX0C IRX0M2 IRX0M1
R R/W
0 0 0
INTRX1
IRX1C IRX1M2 IRX1M1
R R/W
0 0 0
INTUSB
IUSB0C IUSBM2 IUSBM1
R R/W
0
INTALM0
IA0C IA0M2 IA0M1
R R/W
0 0 0
INTALM2
IA2C IA2M2 IA2M1
R R/W
0 0 0
0
I0M0
0
I1M0
0
I3M0
0
I5M0
0
ITA0M0
0
ITA2M0
0
ITB0M0
0
ITBO0M0
0
IRX0M0
0
IRX1M0
0
IUSBM0
IA0M0
0
IA2M0
0
2009-06-19