Toshiba TLCS-900/H1 Series Manual page 393

3.16.3 Limitations arising when using SDRAM
Take care to note the following points when using SDRAMC.
1. WAIT access
When using SDRAM, some limitation is added when accessing memory other than
SDRAM. In WAIT-pin input setting of the Memory Controller, if the setting time is
inserted as an external WAIT, set a time less than the Auto-Refresh cycle × 14 (Auto-
Refresh function controlled by SDRAM controller).
2. Execution of SDRAM command before HALT instruction (SR (Self refresh)-Entry,
Initialize, Mode-set)
When a SDRAM controller command (SR-Entry, Initialize and Mode-set) is issued,
several states are required for execution time after the SDCMM register is set.
Therefore, when a HALT instruction is executed after the SDRAM command, please
insert a NOP of more than 10 bytes or 10 other instructions before executing the HALT
instruction.
3. AR (Auto-Refresh) interval time
When using SDRAM, set the system clock frequency to satisfy the minimum operation
frequency for the SDRAM and minimum refresh cycle.
In a system in which SDRAM is used and the clock is geared up and down,exercise care
in AR cycle for SDRAM.
When AR cycle is changed, set to disable by writing "0" to SDRCR<SRC>.
The AR cycle may also not correspond to the SDRAM A.C specification when stopping
Auto-Refresh. Therefore, set Auto-Refresh cycle after adding 10 states to distibuted
Auto-Refresh cycle.
(Example of calculation)
Condition:
f =12MHz,
SYS
SDRAM specification of distributed Auto-Refresh interval time =4096times/64ms
64ms/ 4096times = 15.625us/1time = 187.5state/1time
187.5 − 10 = 177.5state/less than 1 time is needed → 156 state is needed
4. Self-Refresh ENTRY method
In order to prevent a conflict between a Self-Refresh ENTRY command and an
Auto-Refresh, please stop Auto-Refresh once.
A) Disable Auto Refresh before writing Self Refresh ENTRY command.
B) Enable Auto Refresh after writing Self Refresh ENTRY command.
Because the above instruction should be executed continuously, a 16-bit instruction must
be used as below.
(Example of recommended settings)
*DI
LDW (SDRCR),0000010100000010B
LD (SDRCR),0000---1B
Note : * When using SDRAM as a stack pointer, it is necessary to disable SDRAM access by, for example, a "DI"
instruction.
Disable AR → SR-ENTRY
;
; Enable AR
92CH21-391
TMP92CH21
2009-06-19