Toshiba TLCS-900/H1 Series Manual page 193

3.10 USB Controller
3.10.1 Outline
This USB controller (UDC) is designed to support a variety of serial links in the construction
of a USB system.
The outline is as follows:
(1) Compliant with USB rev1.1
(2) Full-speed: 12 Mbps (low-speed (1.5 Mbps) not supported)
(3) Auto bus enumeration with 384-byte descriptor RAM
(4) Supports 3 kinds of transfer type: Control, interrupt and bulk
Endpoint 0:
Endpoint 1:
Endpoint 2:
Endpoint 3:
(5) Built-in DPLL which generates sampling clock for receive data
(6) Detecting and generating SOP, EOP, RESUME, RESET and TIMEOUT
(7) Encoding and decoding NRZI data
(8) Inserting and discarding stuffed bit
(9) Detecting and checking CRC
(10) Generating and decoding packet ID
(11) Built-in power management function
(12) dual packet mode supported
Note1:The TMP92CH21 does not include the pull-up resistor necessary for D+pin. An external pull-up resistor plus
software support is required.
Note2:There are some differences between our specifications and USB 1.1. Refer to "3.10.11 Notice and
Restrictions".
Control 64 bytes × 1-FIFO
BULK (out) 64 bytes × 2-FIFO
BULK (in) 64 bytes × 2-FIFO
Interrupt (in)
92CH21-191
8 bytes × 1-FIFO
TMP92CH21
2009-06-19