Toshiba TLCS-900/H1 Series Manual page 440

3.21.2 Hardware Specification for Internal Boot ROM
(1) Memory map
Figure 3.21.1 shows a memory map of BOOT mode.
An 8-Kbyte ROM is built-in and it is mapped to address 3FE000H to 3FFFFFH.
In MULTI mode, the boot ROM is not mapped and its area is mapped as an external
area.
(2) Reset/interrupt address conversion circuit
A reset/interrupt vector address conversion circuit is included.
This function allows for individual reset/interrupt vector areas. For details, refer to
section 3.6.5, Internal Boot ROM Control.
(3) Clearing boot ROM
After boot sequence in BOOT mode, the application system program may continue to
run without reset asserting. In this case, any external memory which is mapped to
address 3FE000H to 3FFFFFH cannot be accessed because the boot ROM is assigned
here.
So, an internal boot ROM can be cleared by setting BROMCR<ROMLESS> to "1".
For the details, refer to section 3.6.5, Internal Boot ROM Control.
000000H
001D00H
002000H
Internal RAM
006000H
3FE000H
Internal boot ROM
3FFF00H
400000H
FFFF00H
Figure 3.21.1 Memory
Map of BOOT Mode
92CH21-438
Internal I/O
(16 Kbytes)
(8 Kbytes)
(B) Reset/interrupt
(A) Reset/interrupt
TMP92CH21
vector area (256 bytes)
vector area (256 bytes)
2009-06-19