Toshiba TLCS-900/H1 Series Manual page 64

3.5 Function of Ports
The TMP92CH21 I/O port pins are shown in Table 3.5.1 and Table 3.5.2. In addition to
functioning as general-purpose I/O ports, these pins are also used by the internal CPU and I/O
functions. Table 3.5.3 to Table 3.5.5 list the I/O registers and their specifications.
(
R: PD = with programmable pull-down resistor, U = with pull-up resistor)
Port Name Pin Name
Port 1 P10 to P17
Port 2 P20 to P27
Port 3 P30 to P37
Port 4 P40 to P47
Port 5 P50 to P57
Port 6 P60 to P67
Port 7 P70
P71
P72
P73
P74
P75
P76
Port 8 P80
P81
P82
P83
P84
P85
P86
P87
Port 9 P90
P91
P92
P93
P94
P95
P96
P97
Port A PA0 to PA2
PA3 to PA6
PA7
Port C PC0
PC1
PC2
PC3
PC6
PC7
Port F PF0
PF1
PF2
PF7
Table 3.5.1 Port Functions (1/2)
Number
I/O R
of Pins
−
8 I/O
−
8 I/O
−
8 I/O
−
8 Output
−
8 Output
−
8 I/O
−
1 Output
−
1 I/O
−
1 I/O
−
1 Output
−
1 Output
−
1 I/O
−
1 I/O
−
1 Output
−
1 Output
−
1 Output
−
1 Output
−
1 Output
−
1 Output
−
1 Output
−
1 Output
−
1 I/O
−
1 I/O
−
1 I/O
−
1 I/O
−
1 I/O
−
1 Output
1 Input PD
−
1 Input
3 Input U
4 I/O U
1 Input U
−
1 I/O
−
1 I/O
−
1 I/O
−
1 I/O
−
1 I/O
−
1 I/O
−
1 I/O
−
1 I/O
−
1 I/O
−
1 Output
92CH21-62
I/O Setting Pin Name for Built-in Function
Bit D8 to D15
Bit D16 to D23, KO0 to KO7
Bit D24 to D31
(Fixed) A0 to A7
(Fixed) A8 to A15
Bit A16 to A23
(Fixed)
RD
Bit ,
WRLL NDRE
Bit ,
WRLU NDWE
(Fixed) EA24
(Fixed) EA25
Bit R/ W , NDR/ B
Bit
WAIT
(Fixed)
CS 0
(Fixed) ,
CS 1 SDCS
(Fixed) ,
CS 2 CSZA
(Fixed)
CS 3
(Fixed) ,
CSZB WRUL
(Fixed) ,
CSZC WRUU
(Fixed) ,
CSZD SRULB
(Fixed) ,
CSZE SRUUB
Bit TXD0, I2SCKO
Bit RXD0, I2SDO
Bit SCLK0,
CTS
Bit LGOE0
Bit LGOE1
(Fixed) LGOE2, CLK32KO
(Fixed) INT4, PX
(Fixed) INT5, PY
(Fixed) KI0 to KI2
Bit LD8 to LD11, KI3 to KI6
(Fixed) KI7
Bit INT0, TA1OUT
Bit INT1, TA3OUT
Bit INT2, TB0OUT0
Bit INT3
Bit KO8, LDIV
Bit , LCP1
CSZF
Bit TXD0, TXD1
Bit RXD0, RXD1
Bit SCLK0,
CTS
(Fixed) SDCLK
TMP92CH21
,
SDCS
,
ND 0 CE
,
ND 1 CE
, I2SWS
0
, SCLK1,
0 CTS 1
2009-06-19