Toshiba TLCS-900/H1 Series Manual page 224

3.10.3.17 EOP Register
This register is used when a control transfer type dataphase terminates or when a
short packet is transmitting bulk-IN or interrupt-IN.
EOP
EP7_EOPB
bit Symbol
(07CFH)
Read/Write
Reset State
Note1: EOP<EP7_EOPB, EP6_EOPB, EP5_EOPB, EP4_EOPB> registers are not used in the TMP92CH21.
Note2: When writing to this register, a recovery time of 5clocks at 12MHz is needed. After writing this register, insert
dummy instruction of 420 ns or longer.
In a control transfer type dataphase, write "0" to <EP0_EOPB> when all
transmission data is written to the FIFO, or read all receiving data from the FIFO.
The UDC terminates its status stage on this signal.
When a short packet is transmitted by using bulk-IN or interrupt-IN endpoint, use
this to terminate writing of transmission data. In this case, write "0" to <EP0_EOPB>
of writing endpoint. Write "1" to other bits.
7 6 5
EP6_EOPB EP5_EOPB
W W W
1 1 1
92CH21-222
4 3
EP4_EOPB EP3_EOPB EP2_EOPB
W W
1 1
TMP92CH21
2 1 0
EP1_EOPB EP0_EOPB
W W W
1 1 1
2009-06-19