Toshiba TLCS-900/H1 Series Manual page 425

The following block diagram illustrates this mode.
Selector
φT1
φT4
φT16
Selector
TB0RG0H/L-
WR
TB0RUN<TB0RDE>
The following example shows how to set 16-bit PPG output mode:
7
← 0
TB0RUN
←
TB0RG0H/L *
*
←
TB0RG1H/L
*
*
← 1
TB0RUN
← 1
TB0FFCR
← 0
TB0MOD
← −
PCCR
← −
PCFC
← 1
TB0RUN
X: Don't care, −: No change
16-bit up counter
UC10
Match
16-bit comparator
TB0RG0H/L
Register buffer 10
Internal data bus
Figure 3.18.8 Block Diagram of 16-Bit Mode
6 5 4 3 2 1 0
−
0 X X 0 X 0
* * * * * * *
* * * * * * *
* * * * * * *
* * * * * * *
−
0 X X 0 X 0
1 0 0 1 1 1 0
0 1 0 0 1
* *
(** = 01, 10, 11)
− − − −
1 X X
− − − −
1 X X
−
0 X X 1 X 1
92CH21-423
TB0RUN<TB0RUN> TB0OUT0 (PPG output)
Clear
16-bit comparator
TB0RG1H/L
Disable the TB0RG0H/L double buffer and stop TMRB0.
Set the duty ratio (16 bits).
Set the frequency (16 bits).
Enable the TB0RG0H/L double buffer.
(The duty and frequency are changed on an INTTB01 interrupt.)
Set the mode to invert TB0FF0 at the match with
TB0RG0H/L/TB0RG1H/L. Set TB0FF0 to 0.
Select the Prescaler output clock as the input clock and disable
the capture function.
Set PC6 to function as TB0OUT0.
Start TMRB0.
TMP92CH21
F/F
(TB0FF0)
2009-06-19