Toshiba TLCS-900/H1 Series Manual page 258

4. If ACK handshake from host is received,
•
Set STATU to READY.
• Assert INT_STATUS interrupt.
It finishes normally by the above transaction.
If a time out occurs without receiving ACK from host,
• Set STATUS register to TX_ERR and state returns to IDLE, and wait for
restring status stage.
At this point, if new SETUP stage is started without status stage finishing
normally, the UDC sets error to STATUS register.
(c-3-2) OUT status stage
The transaction format for OUT status stage is given below.
• Token: OUT
•
Data: DATA1 (0 data length)
• Handshake: ACK, NAK, STALL
Control flow
The transaction flow for OUT status stage in the UDC is given below.
1. Token packet is received and address, endpoint number and error are
confirmed. If they do not correspond, the state returns to IDLE. If
status stage is enabled based on stage control flow in the UDC,
advance to next stage.
2. STATUS register state is confirmed.
• INVALID condition: State returns to IDLE.
• STALL condition: Data is cleared, stall handshake is returned,
Whether EOP register is accessed or not is confirmed externally. If it
is not accessed, NAK handshake is returned to continue control
transfer, and state returns to IDLE.
3. If EOP register access is confirmed, 0-data-length data packet and
CRC are received.
4. If there is no error in data, ACK handshake is transmitted to host.
• Set STATUS to READY.
• Assert INT_STATUS interrupt.
It finishes normally by the above transaction.
If there is an error in data, ACK handshake is not returned.
• Set RX_ERR to STATUS register and return to IDLE. It waits to retry
status stage.
At this point, if new SETUP stage is started without status stage finishing
normally, the UDC sets error to STATUS register. For sequence of this
protocol, refer to section supplement.
and state returns to IDLE.
92CH21-256
TMP92CH21
2009-06-19