Toshiba TLCS-900/H1 Series Manual page 209

Original cmos 32-bit microcontroller

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3.10.3.2 EPx_FIFO Register (x: 0 to 3)

Note1: Read or write to these window registers using 1-byte load instructions only, since each register has only a

Note2: When it is IN-token(except isochronous transfer) and the UDC transmits 1-byte data to the host, if the CPU

This register is prepared for each endpoint independently.

This is the window register from or to FIFO RAM.

In the auto bus enumeration, the request controller in UDC sets the mode, which is

defined by the endpoint descriptor, for each endpoint automatically. By this means,

each endpoint is automatically set to each direction.

1-byte address. Do not use load instructions of 2 bytes or 4 bytes.

writes "eop" to the endpoint on a certain timing, a NULL data(0-byte data) may be transmitted.Therefore,

prevent the tramsfer of 1-byte by for example introducing dummy data.

The device request that is received from the USB host is stored in the following

8-byte registers:

bmRequestType,

wLength_L and wLength_H. These are updated whenever a new SETUP token is

received from the host.

When the UDC receives without error, INT_SETUP interrupt is asserted, meaning

the new device request has been received.

There is also a request which is operated automatically by the UDC, depending on

the request received.

In that case, the UDC does not assert the INT_SETUP interrupt. Any request which

STANDARD_REQUEST_FLAG and REQUEST_FLAG.

Tmp92ch21fg Jtmp92ch21