Toshiba TLCS-900/H1 Series Manual page 114

Operand Start
Operand Data
Size (bit)
Address
4n + 0
4n + 1
4n + 2
8
4n + 3
4n + 0
4n + 1
4n + 2
16
4n + 3
4n + 0
4n + 1
4n + 2
32
4n + 3
xxxxx: During a read, data input to the bus ignored. At write, the bus is at high impedance and the write
strobe signal remains non active.
Memory Data Size
CPU Address
(bit)
4n + 0
8/16/32
4n + 1
8
4n + 1
16/32
4n + 2
8/16
4n + 2
32
4n + 3
8
4n + 3
16
4n + 3
32
(1) 4n + 0
8
(2) 4n + 1
4n + 0
16/32
(1) 4n + 1
8
(2) 4n + 2
(1) 4n + 1
16
(2) 4n + 2
4n + 1
32
(1) 4n + 2
8
(2) 4n + 1
4n + 2
16
4n + 2
32
(1) 4n + 3
8
(2) 4n + 4
(1) 4n + 3
16
(2) 4n + 4
(1) 4n + 3
32
(2) 4n + 4
(1) 4n + 0
8
(2) 4n + 1
(3) 4n + 2
(4) 4n + 3
(1) 4n + 0
16
(2) 4n + 2
4n + 0
32
(1) 4n + 0
8
(2) 4n + 1
(3) 4n + 2
(4) 4n + 3
(1) 4n + 1
16
(2) 4n + 2
(3) 4n + 4
(1) 4n + 1
32
(2) 4n + 4
(1) 4n + 2
8
(2) 4n + 3
(3) 4n + 4
(4) 4n + 5
(1) 4n + 2
16
(2) 4n + 4
(1) 4n + 2
32
(2) 4n + 4
(1) 4n + 3
8
(2) 4n + 4
(3) 4n + 5
(4) 4n + 6
(1) 4n + 3
16
(2) 4n + 4
(3) 4n + 6
(1) 4n + 3
32
(2) 4n + 4
92CH21-112
CPU Data
D31 to D24 D23 to D16 D15 to D8
xxxxx xxxxx xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx b7 to b0
xxxxx xxxxx xxxxx
xxxxx b7 to b0 xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx b7 to b0
b7 to b0 xxxxx xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx b15 to b8
xxxxx xxxxx xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx b7 to b0
xxxxx xxxxx xxxxx
xxxxx b15 to b8 b7 to b0
xxxxx xxxxx xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx b15 to b8
b15 to b8 b7 to b0 xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx b7 to b0
xxxxx xxxxx xxxxx
b7 to b0 xxxxx xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx b15 to b8
xxxxx xxxxx b31 to b24 b23 to b16
b31 to b24 b23 to b16 b15 to b8
xxxxx xxxxx xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx b7 to b0
xxxxx xxxxx b23 to b16
xxxxx xxxxx xxxxx
b23 to b16 b15 to b8 b7 to b0
xxxxx xxxxx xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx b15 to b8
xxxxx xxxxx b31 to b24 b23 to b16
b15 to b8 b7 to b0 xxxxx
xxxxx xxxxx b31 to b24 b23 to b16
xxxxx xxxxx xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx xxxxx
xxxxx xxxxx b7 to b0
xxxxx xxxxx b23 to b16
xxxxx xxxxx xxxxx
b7 to b0 xxxxx xxxxx
xxxxx b31 to b24 b23 to b16
TMP92CH21
D7 to D0
b7 to b0
b7 to b0
xxxxx
b7 to b0
xxxxx
b7 to b0
xxxxx
xxxxx
b7 to b0
b15 to b8
b7 to b0
b7 to b0
b15 to b8
xxxxx
b15 to b8
xxxxx
b7 to b0
b15 to b8
b7 to b0
xxxxx
b7 to b0
b15 to b8
xxxxx
b15 to b8
xxxxx
b15 to b8
b7 to b0
b15 to b8
b23 to b16
b31 to b24
b7 to b0
b7 to b0
b7 to b0
b15 to b8
b23 to b16
b31 to b24
xxxxx
b15 to b8
b31 to b24
xxxxx
b31 to b24
b7 to b0
b15 to b8
b23 to b16
b31 to b24
b7 to b0
xxxxx
b7 to b0
b15 to b8
b23 to b16
b31 to b24
xxxxx
b15 to b8
b31 to b24
xxxxx
b15 to b8
2009-06-19