Toshiba TLCS-900/H1 Series Manual page 265
Original cmos 32-bit microcontroller
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TMP92CH21
Note: EPx_DATASETA,B change at 3 clocks of 12MHz after receiving SOF. Write data to FIFO after
EPx_DATASETA,B are changing.
SOF
EPx_DATASET_A
EPx_DATASET_B
EPx_DATASET
BWR
EPx_BWR
IN
IN
IN
3clocks (12MHz)
DATA0
DATA0
DATA0
Figure 3.10.9 Isochronous transfer Mode
2009-06-19
92CH21-263
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