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Toshiba TLCS-900/H1 Series Manual page 407

Original cmos 32-bit microcontroller
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3.17.4.4 NAND-Flash Status Register (ND0FSR and ND1FSR)
Bits
Mnemonic
7
BUSY
6:0
Note: A noise-filter for some states is built into the NDFC, so when the NDR/ B pin changes, a <BUSY> flag is not
renewed at the same time. Therefore, insert several delays (e.g., "NOP" instruction × 10) using software before
starting this flag check.
Read command
pin
NDWE
NDCLE pin
NDALE pin
NDR/ B pin
<BUSY> flag
Figure 3.17.5 NAND-Flash Status Register (ND0FSR and ND1FSR)
7
BUSY
R
Field Name
BUSY
BUSY (Default: Undefined)
This bit shows the status of the NAND-Flash.
0: Ready
1: Busy
Reserved
Address input
92CH21-405
6
Description
Delay time
Sensing <BUSY> flag
TMP92CH21
0
: Type
: Default
2009-06-19

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