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Toshiba TLCS-900/H1 Series Manual page 274

Original cmos 32-bit microcontroller
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Data can be set to available FIFO when transmitting regardless of packet A or B.
Transmitting number > payload × (number of available packet)
• Write number of payload × (number of available packet) in
relevant endpoint
• Total = Total − payload × (number of available packet)
If transmitting number reach to payload,
UDC sets 1 to relevant bit
of DATASET register.
Figure 3.10.16 Transmitting Sequence in Dual Packet Mode
Below is the Transmitting Sequence in Dual Packet Mode.
Wait transmitting event
DATASETregister
• Check bit of EPx_DSET_A
• Check bit of EPx_DSET_B
When receiving In-Token from USB Host,
UDC transmits data.
Clear relevant bit of DATASET register
92CH21-272
IDLE
Transmitting event
Transmittind
data distinction
Transmitting number < payload × (number of available packet)
• Write number of transmitting in relevant endpoint
• Total = 0
EOP register
Write 0 to only bit of relevant
endpoint
Return to IDLE
• Accessing to EOP register is needed in
transmitting short packet.
• Control transfer type is supported in
only single mode.
TMP92CH21
UDC sets 1 to relevant bit
of DATASET register.
2009-06-19

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