Toshiba TLCS-900/H1 Series Manual page 109

B0CSL Bit symbol
(0140H)
Read/Write
Reset State
B0CSH Bit symbol B0E
(0141H)
Read/Write
Reset State
MAMR0 Bit symbol M0V20
(0142H)
Read/Write
Reset State
MSAR0 Bit symbol M0S23
(0143H)
Read/Write
Reset State
B1CSL Bit symbol
(0144H)
Read/Write
Reset State
B1CSH Bit symbol B1E
(0145H)
Read/Write
Reset State
MAMR1 Bit symbol M1V21
(0146H)
Read/Write
Reset State
MSAR1 Bit symbol M1S23
(0147H)
Read/Write
Reset State
B2CSL Bit symbol
(0148H)
Read/Write
Reset State
B2CSH Bit symbol B2E
(0149H)
Read/Write
Reset State
MAMR2 Bit symbol M2V22
(014AH)
Read/Write
Reset State
MSAR2 Bit symbol M2S23
(014BH)
Read/Write
Reset State
B3CSL Bit symbol
(014CH)
Read/Write
Reset State
B3CSH Bit symbol B3E
(014DH)
Read/Write
Reset State
MAMR3 Bit symbol M3V22
(014EH)
Read/Write
Reset State
MSAR3 Bit symbol M3S23
(014FH)
Read/Write
Reset State
Note 1: Always write "0".
Note 2:Read-modify-write is prohibited for BnCS0 and BnCSH (n = 0 to 3) registers.
Table 3.6.1 Control Register
7 6 5
B0WW2 B0WW1
W
0 1
− −
0 0 (Note) 0 (Note)
M0V19 M0V18
1 1 1
M0S22 M0S21
1 1 1
B1WW2 B1WW1
W
0 1
− −
0 0 (Note) 0 (Note)
M1V20 M1V19
1 1 1
M1S22 M1S21
1 1 1
B2WW2 B2WW1
W
0 1
−
B2M
1 0 0 (Note)
M2V21 M2V20
1 1 1
M2S22 M2S21
1 1 1
B3WW2 B3WW1
W
0 1
− −
0 0 (Note) 0 (Note)
M3V21 M3V20
1 1 1
M3S22 M3S21
1 1 1
92CH21-107
4 3
B0WW0 B0WR2
0
B0REC B0OM1 B0OM0
W
0 0
M0V17 M0V16 M0V15
R/W
1 1
M0S20 M0S19 M0S18
R/W
1 1
B1WW0 B1WR2
0
B1REC B1OM1 B1OM0
W
0 0
M1V18 M1V17 M1V16
R/W
1 1
M1S20 M1S19 M1S18
R/W
1 1
B2WW0 B2WR2
0
B2REC B2OM1 B2OM0
W
0 0
M2V19 M2V18 M2V17
R/W
1 1
M2S20 M2S19 M2S18
R/W
1 1
B3WW0 B3WR2
0
B3REC B3OM1 B3OM0
W
0 0
M3V19 M3V18 M3V17
R/W
1 1
M3S20 M3S19 M3S18
R/W
1 1
TMP92CH21
2 1 0
B0WR1 B0WR0
W
0 1 0
B0BUS1 B0BUS0
0 0 0
M0V14 to M0V8
M0V9
1 1 1
M0S17 M0S16
1 1 1
B1WR1 B1WR0
W
0 1 0
B1BUS1 B1BUS0
0 0 0
M1V15 to M1V8
M1V9
1 1 1
M1S17 M1S16
1 1 1
B2WR1 B2WR0
W
0 1 0
B2BUS1 B2BUS0
0 0 0
M2V16 M2V15
1 1 1
M2S17 M2S16
1 1 1
B3WR1 B3WR0
W
0 1 0
B3BUS1 B3BUS0
0 0 0
M3V16 M3V15
1 1 1
M3S17 M3S16
1 1 1
2009-06-19