General Registers - NEC 78014Y Series User Manual

5.2.2 General registers

A general register is mapped at particular addresses (FEE0H to FEFFH) of the data memory. It consists of 4 banks,
each bank consisting of eight 8-bit registers (X, A, C, B, E, D, L and H).
Each register can also be used as an 8-bit register. Two 8-bit registers can be used in pairs as a 16-bit register
(AX, BC, DE and HL).
They can be described in terms of function names (X, A, C, B, E, D, L, H, AX, BC, DE and HL) and absolute names
(R0 to R7 and RP0 to RP3).
Register banks to be used for instruction execution are set with the CPU control instruction (SEL RBn). Because
of the 4-register bank configuration, an efficient program can be created by switching between a register for normal
processing and a register for interrupt request for each bank.
Bank
Name
BANK0
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BANK1
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CHAPTER 5 CPU ARCHITECTURE
Table 5-4. Absolute Address Corresponding to General Registers
Register
Function Absolute
Name Name
H R7
L R6
D R5
E R4
B R3
C R2
A R1
X R0
H R7
L R6
D R5
E R4
B R3
C R2
A R1
X R0
Absolute Bank
Address Name Function
Name
FEFFH BANK2 H
FEFEH L
FEFDH D
FEFCH E
FEFBH B
FEFAH C
FEF9H A
FEF8H X
FEF7H BANK3 H
FEF6H L
FEF5H D
FEF4H E
FEF3H B
FEF2H C
FEF1H A
FEF0H X
Register Absolute
Absolute Address
Name
R7 FEEFH
R6 FEEEH
R5 FEEDH
R4 FEECH
R3 FEEBH
R2 FEEAH
R1 FEE9H
R0 FEE8H
R7 FEE7H
R6 FEE6H
R5 FEE5H
R4 FEE4H
R3 FEE3H
R2 FEE2H
R1 FEE1H
R0 FEE0H