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Major revisions by edition and revised chapters are shown below.
Edition
4th
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APPENDIX E REVISION HISTORY
Major revisions from previous edition
µ PD78014Y subseries were added as applied devices.
Frequency of main system clock oscillator is changed from 8.38 MHz to 10.0 MHz.
Item "After Reset" was added in section 2.1.1 "Normal operating mode pins".
Cautions on pull-up resistors disconnection for P60 to P63 pins by mask option
was added.
Pin input/output circuit types were changed as follows.
Change: Type 5-B to Type 5-E, Type 9-B to Type 11
Addition: Type 16
Memory size switching register is incorporated in all applied devices, not only in
the µ PD78P014.
Cautions on using port 1 as A/D converter input was added.
Cautions on port mode register setting when port 2 is used in the SBI mode was
added.
Cautions on port mode register setting was added.
Cautions on pull-up resistor option register when port is used as dual-function pin
was added.
Cautions on CR00 setting was added.
Timing chart for square-wave output operation was added.
Cautions on using 8-bit timer registers 1 and 2 as a 16-bit timer register was added.
Interval times of interval timer were changed.
Block diagram for watchdog timer was corrected.
Cautions on overflow time when the watchdog timer is cleared by setting bit 7
(RUN) of WDTM to 1 was added.
Condition under which clock output cannot be used was added.
Condition under which buzzer output cannot be used was added.
APPENDIX E REVISION HISTORY
(1/4)
Revised Chapters
General
CHAPTER 2 PIN FUNCTION
CHAPTER 3
CPU ARCHITECTURE
CHAPTER 4
PORT FUNCTIONS
CHAPTER 6 16-BIT
TIMER/EVENT COUNTER
CHAPTER 7 8-BIT
TIMER/EVENT COUNTER
CHAPTER 8 WATCH TIMER
CHAPTER 9 WATCHDOG
TIMER
CHAPTER 10 CLOCK
OUTPUT CONTROL CIRCUIT
CHAPTER 11 BUZZER
OUTPUT CONTROL CIRCUIT
543
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