Interrupt Servicing Operations; Non-Maskable Interrupt Request Acknowledge Operation - NEC 78014Y Series User Manual

8-bit single-chip microcontrollers
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18.4 Interrupt Servicing Operations

18.4.1 Non-maskable interrupt request acknowledge operation

A non-maskable interrupt request is unconditionally acknowledged even if in an interrupt request acknowledge
disable state. It does not undergo interrupt priority control and has highest priority over all other interrupts.
If a non-maskable interrupt request is acknowledged, the contents of acknowledged interrupt is saved in the stacks,
program status word (PSW) and program counter (PC), in that order, the IE and ISP flags are reset to 0, and the vector
table contents are loaded into PC and branched.
A new non-maskable interrupt request generated during execution of a non-maskable interrupt servicing program
is acknowledged after the current execution of the non-maskable interrupt servicing program is terminated (following
RETI instruction execution) and one main routine instruction is executed. If a new non-maskable interrupt request
is generated twice or more during non-maskable interrupt service program execution, only one non-maskable interrupt
request is acknowledged after termination of the non-maskable interrupt service program execution.
Figure 18-9 shows the flowchart from non-maskable interrupt request generation to acknowledge. Figure 18-10
shows the non-maskable interrupt request acknowledge timing. Figure 18-11 shows the acknowledge operation if
multiple non-maskable interrupt requests are generated.
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CHAPTER 18 INTERRUPT FUNCTIONS AND TEST FUNCTION
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