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(c) In the SBI mode, the BUSY signal is output until the falling of the next serial clock after the BUSY release
indication. If WUP = 1 is set by mistake during this period, BUSY will not be released. Thus, after releasing
BUSY, be sure to check that the SB0 (SB1) has become high level before setting WUP = 1.
(d) For pins which are to be used for data input/output, be sure to carry out the following settings before serial
transfer of the 1st byte after RESET input.
<1> Set the P25 and P26 output latches to 1.
<2> Set bit 0 (RELT) of the serial bus interface control register (SBIC) to 1.
<3> Reset the P25 and P26 output latches from 1 to 0.
(e) The bus release signal or the command signal is acknowledged when the SCK0 line is in high level, and
the SB0 (SB1) line changes from low level to high level or from high level to low level. Thus, if the timing
at which bus changes deviates due to effects such as board capacity, it may be determined as the bus release
signal (or the command signal) even if data is sent. Therefore perform wiring carefully.
15.4.4 2-wire serial I/O mode operation
The 2-wire serial I/O mode can cope with any communication format by program.
Communication is basically carried out with two lines of serial clock (SCK0) and serial data input/output (SB0 or
SB1).
Figure 15-32. Example of Serial Bus Configuration with 2-Wire Serial I/O
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CHAPTER 15 SERIAL INTERFACE CHANNEL 0 ( µ PD78014 Subseries)
V
Master
SCK0
SB0 (SB1)
V
DD
DD
SCK0
SB0 (SB1)
Slave
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