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5.4.3 Register addressing
[Function]
The general register is accessed as an operand. The general register to be accessed is specified with register
bank select flags (RBS0 and RBS1) and register specify code (Rn and RPn) in the instruction code.
Register addressing is carried out when an instruction with the following operand format is executed. When an
8-bit register is specified, one of the eight registers is specified with 3 bits in the operation code.
[Operand format]
'r' and 'rp' can be described with function names (X, A, C, B, E, D, L, H, AX, BC, DE and HL) as well as absolute
names (R0 to R7 and RP0 to RP3).
[Description example]
MOV A, C; when selecting C register as r
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INCW DE; when selecting DE register pair as rp
CHAPTER 5 CPU ARCHITECTURE
Identifier
Description
r
X, A, C, B, E, D, L, H
rp
AX, BC, DE, HL
Instruction code 0
1
1
0
Instruction code 1
0
0
0
0
0
1
0
Register specify code
0
1
0
0
Register specify code
121
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