Table of Contents
Advertisement
(2) Watch timer mode control register (TMC2)
This register sets the watch timer operating mode, watch flag set time and prescaler interval time and enables/
disables prescaler and 5-bit counter operations.
TMC2 is set with a 1-bit or 8-bit memory manipulation instruction.
RESET input sets TMC2 to 00H.
Symbol
TMC2
www.DataSheet4U.com
Note
Remarks 1. f
Figure 10-3. Watch Timer Mode Control Register Format
7
6
5
4
0
TMC26 TMC25 TMC24 TMC23 TMC22 TMC21 TMC20
Do not frequently clear the prescaler when using the watch timer.
: Watch timer clock frequency (f
W
2. Values in parentheses apply to operation with f
CHAPTER 10 WATCH TIMER
3
2
1
0
TMC23 TMC20 Watch Flag Set Time Selection
TMC21 Prescaler Operation Control
TMC22 5-Bit Counter Operation Control
TMC26 TMC25 TMC24 Prescaler Interval Time
8
/2
or f
)
X
XT
= 32.768 kHz.
W
Address
When Reset
R/W
FF4AH
00H
R/W
0
0
2
14
/f
(0.5 s)
W
13
1
2
/f
(0.25 s)
W
(977 µ s)
0
1
2
5
/f
W
(488 µ s)
1
2
4
/f
W
0
Clear after operation stops
1
Operation enable
0
Clear after operation stops
1
Operation enable
Selection
(488 µ s)
4
0
0
0
2
/f
W
(977 µ s)
0
0
1
2
5
/f
W
0
1
0
2
6
/f
(1.95 ms)
W
7
0
1
1
2
/f
(3.91 ms)
W
1
0
0
2
8
/f
(7.81 ms)
W
1
0
1
2
9
/f
(15.6 ms)
W
Other than above
Setting prohibited
Note
227
Advertisement
Table of Contents
