Table of Contents
Advertisement
(b) In case the automatic data transmit/receive function is performed by an external clock
www.DataSheet4U.com
CHAPTER 17 SERIAL INTERFACE CHANNEL 1
When bit 1 (CSIM11) of the serial operation mode register 1 (CSIM1) is cleared to 0, the external clock
performs.
When the automatic data transmit/receive function is performed by an external clock, it must be chosen so
that the interval may be longer than the value shown below.
Table 17-3. Interval by CPU Processing (in External Clock Operation)
CPU Processing
When using multiply instruction
When using divide instruction
External access 1 wait mode
Other than above
T
: 1/f
CPU
CPU
f
: CPU clock (set by bit 0 to bit 2 (PCC0 to PCC2) of processor clock control register)
CPU
Interval
26 T
or more
CPU
40 T
or more
CPU
18 T
or more
CPU
14 T
or more
CPU
445
Advertisement
Table of Contents
