NEC 78014Y Series User Manual page 16

8-bit single-chip microcontrollers
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3.2.17 IC (Mask ROM version only) .............................................................................................
3.3
CHAPTER 4
4.1
Pin Function List ............................................................................................................
4.1.1
4.1.2
4.2
Description of Pin Functions .......................................................................................
4.2.1
4.2.2
4.2.3
4.2.4
4.2.5
4.2.6
4.2.7
4.2.8
4.2.9
4.2.11 RESET ................................................................................................................................
4.2.12 X1 and X2 ...........................................................................................................................
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4.2.13 XT1 and XT2 ......................................................................................................................
4.2.17 IC (Mask ROM versions only) ...........................................................................................
4.3
5.1
Memory Spaces ..............................................................................................................
5.1.1
5.1.2
5.1.3
5.1.4
5.2
Processor Registers ...................................................................................................... 102
5.2.1
5.2.2
5.2.3
5.3
Instruction Address Addressing ................................................................................. 111
5.3.1
5.3.2
5.3.3
5.3.4
16
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( µ PD78P014 only) .......................................................................................................
PIN FUNCTION ( µ PD78014Y Subseries) ............................................................
Normal operating mode pins .............................................................................................
PROM programming mode pins ( µ PD78P014Y only) ......................................................
P00 to P04 (Port 0) ............................................................................................................
P10 to P17 (Port 1) ............................................................................................................
P20 to P27 (Port 2) ............................................................................................................
P30 to P37 (Port 3) ............................................................................................................
P40 to P47 (Port 4) ............................................................................................................
P50 to P57 (Port 5) ............................................................................................................
P60 to P67 (Port 6) ............................................................................................................
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( µ PD78P014Y only) .....................................................................................................
CPU ARCHITECTURE ...........................................................................................
Internal program memory space ....................................................................................... 100
Internal data memory space .............................................................................................. 101
Special function register (SFR) area ................................................................................. 101
External memory space ..................................................................................................... 101
Control registers ................................................................................................................. 102
General registers ................................................................................................................ 106
Special function register (SFR) ......................................................................................... 108
Relative addressing ............................................................................................................ 111
Immediate addressing ........................................................................................................ 112
Table indirect addressing ................................................................................................... 113
Register addressing ........................................................................................................... 114
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73
73
73
74
79
79
79
82
83
83
84
85
86
87
87
88
88
88
88
88
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89
89
89
89
89
90
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