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8.5 16-Bit Timer/Event Counter Operations
8.5.1 Interval timer operations
By setting bits 2 and 3 (TMC02 and TMC03) of the 16-bit timer mode control register (TMC0) to 1 and 1, they are
operated as an interval timer. Interrupt requests are generated repeatedly using the count value set in 16-bit compare
register (CR00) beforehand is used as the interval.
When the count value of the 16-bit timer register (TM0) matches the value set to CR00, counting continues with
the TM0 value cleared to 0 and the interrupt request signal (INTTM0) is generated.
Count clock of the 16-bit timer/event counter can be selected with bits 4 to 6 (TCL04 to TCL06) of the timer clock
select register 0 (TCL0).
For the operation after changing compare register value during timer count operation, refer to 8.6 16-Bit Timer/
Event Counter Operating Precautions (3).
f
X
f
/2
X
f
/2
X
TI0/P00/INTP0
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CHAPTER 8 16-BIT TIMER/EVENT COUNTER
Figure 8-10. Interval Timer Configuration Diagram
/2
2
16-bit timer register (TM0)
3
16-bit compare
register (CR00)
INTTM0
OVF0
Clear circuit
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