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(3) MSB/LSB switching as the start bit
The 3-wire serial I/O mode enables to select transfer to start at MSB or LSB.
Figure 17-6 shows the configuration of the serial I/O shift register 1 (SIO1) and internal bus. As shown in the
figure, MSB/LSB can be read/written in inverted form.
MSB/LSB switching as the start bit can be specified with bit 6 (DIR) of the serial operating mode register 1 (CSIM1).
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Start bit switching is realized by switching the bit order for data write to SIO1. The SIO1 shift order remains
unchanged.
Thus, switch the MSB/LSB start bit before writing data to the shift register.
(4) Start of transfer
A serial transfer is started by setting transfer data in the serial I/O shift register 1 (SIO1) if the following two
conditions have been satisfied:
• The serial interface channel 1 operation control bit (CSIE1) = 1.
• After an 8-bit serial transfer, the internal serial clock is stopped or SCK1 is high.
Caution Setting CSIE1 to 1 after writing data in SIO1 does not initiate transfer operation.
When an 8-bit data transfer ends, serial transfer is stopped automatically and the interrupt request flag (CSIIF1)
is set.
CHAPTER 17 SERIAL INTERFACE CHANNEL 1
Figure 17-6. Circuit of Switching in Transfer Bit Order
7
6
Internal Bus
1
0
LSB Start
MSB Start
Read/Write Gate
SI1
Shift Register 1 (SIO1)
SO1
SCK1
Read/Write Gate
SO1 Latch
D
Q
421
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