Table of Contents
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Table No.
9-10
Square-Wave Output Ranges when 2-Channel 8-Bit Timer/Event Counters (TM1 and TM2)
are Used as 16-Bit Tmer/Event Counter ........................................................................................... 219
10-1
Interval Timer Interval Time .............................................................................................................. 223
10-2
Watch Timer Configuration ............................................................................................................... 224
10-3
Interval Timer Interval Time .............................................................................................................. 229
11-1
Watchdog Timer Inadvertent Program Loop Detection Time ............................................................ 231
11-2
Interval Time ..................................................................................................................................... 231
11-3
Watchdog Timer Configuration ......................................................................................................... 232
11-4
Watchdog Timer Inadvertent Program Loop Detection Time ............................................................ 237
11-5
Interval Timer Interval Time .............................................................................................................. 238
12-1
Clock Output Control Circuit Configuration ....................................................................................... 240
13-1
Buzzer Output Control Circuit Configuration ..................................................................................... 243
14-1
A/D Converter Configuration ............................................................................................................. 247
15-1
Differences between Channels 0 and 1 ............................................................................................ 263
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15-2
Difference of Serial Interface Channel 0 Modes ............................................................................... 263
15-3
Serial Interface Channel 0 Configuration .......................................................................................... 267
15-4
Various Signals in SBI Mode ............................................................................................................ 300
16-1
Differences between Channels 0 and 1 ............................................................................................ 319
16-2
Difference of Serial Interface Channel 0 Mode ................................................................................. 320
16-3
Serial Interface Channel 0 Configuration .......................................................................................... 325
16-4
Serial Interface Channel 0 Interrupt Request Signal Generation ...................................................... 329
16-5
Various Signals in SBI Mode ............................................................................................................ 361
Signals in the I 2 C Bus Mode ............................................................................................................. 390
16-6
17-1
Serial Interface Channel 1 Configuration .......................................................................................... 410
17-2
Interval by CPU Processing (in Internal Clock Operation) ................................................................ 444
17-3
Interval by CPU Processing (in External Clock Operation) ............................................................... 445
18-1
Interrupt Source List .......................................................................................................................... 448
18-2
Various Flags Corresponding to Interrupt Request Sources ............................................................ 451
18-3
Times from Maskable Interrupt Request Generation to Interrupt Service ......................................... 462
18-4
Interrupt Request Enabled for Multiple Interrupt during Interrupt Servicing ...................................... 465
18-5
Test Input Source .............................................................................................................................. 469
18-6
Various Flags Corresponding to Test Input Signal ........................................................................... 470
19-1
Pin Functions in External Memory Expansion Mode ........................................................................ 473
19-2
State of Port 4 to Port 6 Pins in External Memory Expansion Mode ................................................. 473
32
LIST OF TABLES (2/3)
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