LH75400/01/10/11 (Preliminary) User's Guide
7.2.5 External Bus Read/Write Operations
Table 7-3 and Table 7-4 show how the SMC places data from the external bus onto the
AHB based on the specified AHB control signals. Table 7-5 and Table 7-6 show how the
SMC places data onto the external data bus and exercises the nBLE[1:0] signals based
on the AHB control signals. During reads, the nBLE[1:0] signals are both LOW or HIGH,
depending on the SMC configuration.
INTERNAL
TRANSFER
WIDTH
Word
(4 transfers)
Halfword
(2 transfers)
Halfword
(2 transfers)
Byte
Byte
Byte
Byte
INTERNAL
TRANSFER
WIDTH
Word
(2 transfers)
Halfword
Halfword
Byte
Byte
Byte
Byte
Table 7-3. 8-bit External Bus Read
ACCESS: READ, 8-BIT EXTERNAL BUS
HSIZE[1:0]
10
10
10
10
01
01
00
00
00
00
Table 7-4. 16-bit External Bus Read
ACCESS: READ, 8-BIT EXTERNAL BUS
HSIZE[1:0]
10
10
01
01
00
00
00
00
HADDR[1:0]
A[1:0]
xx
11
xx
10
xx
01
xx
00
11
1x
10
01
0x
00
11
11
10
10
01
01
00
00
HADDR[1:0]
A[1:0]
xx
1x
xx
0x
1x
1x
0x
0x
11
1x
10
1x
01
0x
00
0x
6/17/03
Static Memory Controller
EXTERNAL DATA MAPPING
ONTO AHB DATA BUS
31:24
23:16
15:8
7:0
—
—
—
7:0
—
—
—
7:0
—
—
—
7:0
—
—
—
7:0
—
—
—
7.0
—
—
—
7:0
—
—
—
7:0
—
—
—
7:0
—
—
—
EXTERNAL DATA MAPPING
ONTO AHB DATA BUS
31:24
23:16
15:8
15:8
7:0
—
—
—
15:8
15:8
7:0
—
—
—
15:8
15:8
—
—
—
7:0
—
—
—
15:8
—
—
—
7:0
—
—
—
7:0
—
—
—
—
—
—
7:0
7:0
—
7:0
—
7:0
—
—
—
7:0
7-9