Clcdc Programmer's Model; Clcdc Register Summary; Table 13-9. Clcdc Register Summary - Sharp Blue Treak LH75400 User Manual

Color Liquid Crystal Display Controller

13.3 CLCDC Programmer's Model

The base address for the CLCDC is:
CLCDC Base Address: 0xFFFF4000
The following locations are reserved and must not be used during normal operation:
• Locations at offsets 0x030 through 0x1FC
• Locations at offsets 0x400 through 0x7FF

13.3.1 CLCDC Register Summary

NAME
Timing0
Timing1
Timing2
///
UPBASE
LPBASE
INTRENABLE
Ctrl
Status
Interrupt
UPCURR
LPCURR
///
Palette
///
13-10

Table 13-9. CLCDC Register Summary

ADDRESS
TYPE
OFFSET
RW
0x000 0x00000000 Horizontal Timing Panel Control Register
0x004 RW 0x00000000 Vertical Timing Panel Control Register
0x008 RW 0x0000000 Clock and Signal Polarity Control Register
0x00C RW
0x010 RW 0x0000000 Upper Panel Frame Buffer Base Address Register
0x014 RW 0x00000000 Lower Panel Frame Buffer Base Address Register
0x018 RW 0x00000000 Interrupt Enable Register
0x01C RW
0x020 RW 0x00000000 Raw Interrupt Status Register
0x024 R 0x00000000 Final Masked Interrupts Register
0x028 R 0x00000000 Upper Panel Frame Buffer Current Address Register
0x02C R 0x00000000 Lower Panel Frame Buffer Current Address Register
0x030 - 0x1FC
0x200 - 0x3FC RW
0x400 - 0x7FF
7/15/03
LH75400/01/10/11 (Preliminary) User's Guide
RESET
VALUE
Reserved
LCD Panel Parameters, LCD Panel Power, and
0x0000
CLCDC Control Register
0x00000 Reserved
256 × 16-bit Color Palette Register. Palette is
addressed at 32 bits.
Reserved
DESCRIPTION