Pins Pd6/Int6 To Pd0/Int0 Resistor Muxing Register; Table 11-22. Pd_Res_Mux Register Definitions - Sharp Blue Treak LH75400 User Manual

I/O Configuration

11.2.2.9 Pins PD6/INT6 to PD0/INT0 Resistor Muxing Register

PD_RES_MUX is the Pins PD6/INT6 to PD0/INT0 Resistor Muxing Register. This register
allows the pull-up/pull-down to be configured as needed. The active bits used in this reg-
ister are Read/Write.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
11-16
Table 11-21. PD_RES_MUX Register
31 30 29 28
0 0 0 0
R R R R
15 14 13 12
/// PD6
0 0 0 0
R R RW RW RW

Table 11-22. PD_RES_MUX Register Definitions

BITS NAME
31:14 /// Reserved Writing to these bits has no effect. Reading returns 0.
Pin PD6/INT6/DREQ Resistor Source
00 = Pull-down (default)
13:12 PD6
01 = Pull-up
10 = No pull-up or pull-down
11 = Pull-down
Pin PD5/INT5/DACK Resistor Source
00 = Pull-down
11:10 PD5
01 = Pull-up
10 = No pull-up or pull-down (default)
11 = No pull-up or pull-down
Pin PD4/INT4/UARTRX1 Resistor Source
00 = Pull-down
9:8 PD4
01 = Pull-up (default)
10 = No pull-up or pull-down
11 = Pull-up
Pin PD3/INT3/UARTTX1 Resistor Source
00 = Pull-down
7:6 PD3
01 = Pull-up (default)
10 = No pull-up or pull-down
11 = Pull-up
Pin PD2/INT2 Resistor Source
00 = Pull-down
5:4 PD2
01 = Pull-up (default)
10 = No pull-up or pull-down
11 = Pull-up
LH75400/01/10/11 (Preliminary) User's Guide
27 26 25 24 23
///
0 0 0 0 0
R R R R R
11 10 9 8 7
PD5 PD4
1 0 0 1 0
RW RW RW RW
0xFFFE5000 + 0x20
DESCRIPTION
6/17/03
22 21 20 19
0 0 0 0
R R R R
6 5 4 3
PD3 PD2 PD1
1 0 1 1
RW RW RW RW
18 17 16
0 0 0
R R R
2 1 0
PD0
0 1 0
RW RW RW