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LH75400/01/10/11 (Preliminary) User's Guide
21.2.3.14 Port H Data Register
PHDR is the Port H Data Register. The active bits used in this register are Read/Write.
Values written to PHDR are output on the PH pins if the corresponding PHDDR Data Direc-
tion bits are set HIGH (port output).
The values read from each bit of this register are determined by the value of the corre-
sponding bit in the Port H Data Direction Register (see Section 21.2.3.16). A read from this
register returns either:
• The last bit value written if the bit is configured as an output.
• The current value written if the bit is configured as an input.
A System Reset clears all bits.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS
31:8
7:0
31
30
29
28
0
0
0
0
R
R
R
R
15
14
13
12
///
0
0
0
0
R
R
R
R
Table 21-30. PHDR Register Definitions
NAME
///
Reserved Writing to these bits has no effect. Reading returns 0.
Port H Input/Output Data Specifies Port H input or output data, depending
on how the value of the corresponding bit in the PHDDR Register is set
(see Section 21.2.3.16).
Port H Data
PHDDR set as output = PHDR sets the value on the GPIO Port H pins.
PHDDR set as input = PHDR reads the value on the GPIO Port H pins.
Table 21-29. PHDR Register
27
26
25
24
23
///
0
0
0
0
0
R
R
R
R
R
11
10
9
8
7
0
0
0
0
0
R
R
R
R
RW
0xFFFDC000 + 0x04
FUNCTION
6/17/03
General Purpose Input/Output
22
21
20
19
18
0
0
0
0
0
R
R
R
R
R
6
5
4
3
2
Port H Data
0
0
0
0
0
RW
RW
RW
RW
RW
17
16
0
0
R
R
1
0
0
0
RW
RW
21-17
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