Hrtftc Register Definitions; Setup Register; Table 13-35. Setup Register; Table 13-36. Setup Register Definitions - Sharp Blue Treak LH75400 User Manual

Color Liquid Crystal Display Controller

13.4.5 HRTFTC Register Definitions

13.4.5.1 Setup Register

The Setup Register enables Conversion mode or disables it so that signals from the LCDC
pass through unaltered. It also configures the Pixels Per Line when in Conversion mode.
The Pixels Per Line value in this register should be the same as the value entered in the
Timing0 register. The active bits used in this register are Read/Write.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS NAME
31:13
12:4
3:1
0
13-26

Table 13-35. Setup Register

31 30 29 28 27
0 0 0 0 0
R R R R R
15 14 13 12 11
///
0 0 0 0 0
R R R RW RW

Table 13-36. Setup Register Definitions

/// Reserved Writing to these bits has no effect. Reading returns 0.
Pixels Per Line Specifies the number of pixels per line; Program these bits
PPL
with (value required – 1).
Read as 110b. Always write 110b to these bits; otherwise unexpected results
///
may occur.
Conversion Mode Select
CR
0 = Bypass Mode (Signals pass through unchanged)
1 = HR-TFT Mode
LH75400/01/10/11 (Preliminary) User's Guide
26 25 24 23 22
///
0 0 0 0
R R R R R
10 9 8 7
PPL
0 0 0 0
RW RW RW RW RW
0xFFFE4000 + 0x000
FUNCTION
7/15/03
21 20 19 18
0 0 0 0 0
R R R R
6 5 4 3 2
///
0 0 0 1 1
RW RW RW RW
17 16
0 0
R R
1 0
CR
0 0
RW RW