Control Register; Table 13-37. Ctrl Register; Table 13-38. Ctrl Register Definitions - Sharp Blue Treak LH75400 User Manual

LH75400/01/10/11 (Preliminary) User's Guide

13.4.5.2 Control Register

CTRL is the Control Register. The Control Register enables and controls output signals.
The active bits used in this register are Read/Write.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS
31:10
9
8
7:5
4
3
2
1
0

Table 13-37. CTRL Register

31 30 29 28 27
0 0 0 0 0
R R R R R
15 14 13 12 11
///
0 0 0 0 0
R R R R R

Table 13-38. CTRL Register Definitions

NAME
/// Reserved Writing to these bits has no effect. Reading returns 0.
MOD Signal Override Enable Puts the value of MODVAL directly onto
the MOD signal
MODOVRD
0 = LCDMOD pin goes HIGH after the SPS periods specified by the
MODDEL field of the TIMING1 Register.
1 = LCDMOD pin equals the state of MODVAL bit in this register.
MODVAL Mod Signal Value Specifies the value to force onto the MOD signal.
/// Reserved Writing to these bits has no effect. Reading returns 0.
LCDVEEEN Output Enable General purpose output enable to
EN0
LCDVEEEN (only in Bypass Mode).
Display Control Signal Output Controls the output of the Display Con-
DISP
trol signal, LCDDSPLEN (only in Bypass Mode).
/// Reserved Writing to this bit has no effect. Reading returns 0.
CLSEN LCDCLS Signal Controls the Tristate Enable signal LCDCLS.
SPSEN LCDSPS Signal Controls the Tristate Enable signal LCDSPS.
Color Liquid Crystal Display Controller
26 25 24 23 22
///
0 0 0 0 0
R R R R R
10 9 8 7 6
///
0 0 0 0 0
R RW RW R R
0xFFFE4000 + 0x004
FUNCTION
7/15/03
21 20 19 18 17
0 0 0 0 0
R R R R R
5 4 3 2 1
///
0 0 0 0 0
R RW RW R RW
16
0
R
0
0
RW
13-27