Analog-to-Digital Converter/Brownout Detector
23.3.2.3 Results Register
RR is the Results Register. This Read Only register is a 16-entry × 16-bit wide FIFO that
holds 10-bit ADC output and the 4-bit tag number from the Control Bank State Machine.
The read-and-write pointer specifies the FIFO entry to access when a Read or Write is
requested. When the FIFO is full, further data writes are temporarily blocked until at least
one location is available for the write. Reading from RR removes an entry from the First
Out end of the result FIFO.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BIT
31:16
15:6
5:4
3:0
23-12
31
30
29
28
27
0
0
0
0
0
R
R
R
R
R
15
14
13
12
11
BITRES
0
0
0
0
0
R
R
R
R
R
Table 23-8. RR Register Definitions
NAME
///
Reserved Read as zero.
BITRES
ADC Converter Output 10-bit digital output of the ADC converter.
///
Reserved Read as zero.
Control Bank Tag Entry number (HWCTRLBxx or LWCTRLBxx) of the
CBTAG
Control bank. The entry number (x) ranges from 0 to 15, corresponding to the
conversion associated with the bit result.
LH75400/01/10/11 (Preliminary) User's Guide
Table 23-7. RR Register
26
25
24
23
///
0
0
0
0
R
R
R
R
10
9
8
7
0
0
0
0
R
R
R
R
0xFFFC3000 + 0x08
DESCRIPTION
6/25/03
22
21
20
19
18
0
0
0
0
0
R
R
R
R
R
6
5
4
3
2
///
CBTAG
0
0
0
0
0
R
R
R
R
R
17
16
0
0
R
R
1
0
0
0
R
R