Chapter 9 - Reset, Clock, And Power Controller; Figure 9-1. Rcpc Block Diagram - Sharp Blue Treak LH75400 User Manual

System-on-chip preliminary
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Chapter 9
Reset, Clock, and
Power Controller
The Reset, Clock, and Power Controller (RCPC) lets users control System Reset, clocks,
power management, and external interrupt conditioning via the AMBA APB interface.
Figure 9-1 shows a block diagram of the RCPC.
ADVANCED
PERIPHERAL
BUS (APB)
CLOCK CONTROL
POWER DOWN
MODE/FREQUENCY
CONTROL BLOCK
RCPC
REGISTERS
RESET CONTROL
EXTERNAL
INTERRUPT CONTROL

Figure 9-1. RCPC Block Diagram

7/15/03
BLOCK
CHANGE
BLOCK
BLOCK
14.7456 MHz OSCILLATOR
32.768 kHz OSCILLATOR
PLL CLOCK
SYSTEM CLOCK
CPU CLOCK
ON-CHIP PERIPHERAL
CLOCKS
AHB INTERFACE
OSCILLATOR AND PLL
INTERFACE
VECTORED INTERRUPT
CONTROLLER FIQ AND
IRQ OUTPUTS
EXTERNAL RESET/WDT
RESET INPUTS
GLOBAL/RTC/EXTERNAL
RESET OUTPUTS
EXT ASYNCHRONOUS
INTERRUPT INPUTS
CONDITIONED EXTERNAL
INTERRUPTS TO VECTORED
INTERRUPT CONTROLLER
LH754xx-25
9-1

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