LH75400/01/10/11 (Preliminary) User's Guide
21.2.3.18 Port J Data Register
PJDR is the Port J Data Register. The active bits used in this register are Read/Write.
A read from this register returns the current value on the corresponding port input. A
System Reset clears all bits.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS
31:8
7:0
Table 21-37. PJDR Register
31
30
29
28
27
0
0
0
0
0
R
R
R
R
R
15
14
13
12
11
///
0
0
0
0
0
R
R
R
R
R
Table 21-38. PJDR Register Definitions
NAME
///
Reserved Writing to these bits has no effect. Reading returns 0.
Port J Data Port J Input Data Specifies the Port J input data.
26
25
24
23
22
///
0
0
0
0
0
R
R
R
R
R
10
9
8
7
6
0
0
0
0
0
R
R
R
RW
RW
0xFFFDB000 + 0x04
FUNCTION
6/17/03
General Purpose Input/Output
21
20
19
18
0
0
0
0
R
R
R
R
5
4
3
2
Port J Data
0
0
0
0
RW
RW
RW
RW
17
16
0
0
R
R
1
0
0
0
RW
RW
21-21