Table 8-7. P2Drx Register; Table 8-8. P2Drx Fields; Port B/D/F/H/J/L/N Data Register (P2Drx) - Sharp LH79524 User Manual

Table of Contents

Advertisement

LH79524/LH79525 User's Guide

8.2.2.2 Port B/D/F/H/J/L/N Data Register (P2DRx)

Values written to P1DRx are output on the PB/PD/PF/PH/PJ/PL/PN pins if the correspond-
ing P1DDRx Data Direction bits are set for output. When the corresponding Data Direction
Register bit for a pin is set for input, the value read is the state of the GPIO pin. Reading
this register returns either:
• The last bit value written if the bit is configured as an output.
• The current value on the corresponding port pin if configured as an input.
Port L is only in the LH79525. Port J is an input only port. This register will not output values
onto the Port J pins.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS
31:8
7:0
31
30
29
28
27
0
0
0
0
RO
RO
RO
RO
RO
15
14
13
12
11
///
0
0
0
0
RO
RO
RO
RO
RO
Port N: 0xFFFD9000 + 0x04 (4 bits, LH79524 Only)
NAME
///
Reserved Reading this field returns 0. Write the reset value.
Port Input/Output Data Contains the bit-by-bit Port input or output data,
depending on how the corresponding bit in the P1DDRx Register is
PORT_DATA
programmed.
Note that Port N consists of 4 bits and exists on LH79524 only.

Table 8-7. P2DRx Register

26
25
24
23
///
0
0
0
0
0
RO
RO
RO
RO
10
9
8
7
0
0
0
0
0
RO
RO
RO
RW
Port B: 0xFFFDF000 + 0x04
Port D: 0xFFFDE000 + 0x04
Port F: 0xFFFDD000 + 0x04
Port H: 0xFFFDC000 + 0x04
Port J: 0xFFFDB000 + 0x04
Port L: 0xFFFDA000 + 0x04 (LH79524 Only)

Table 8-8. P2DRx Fields

DESCRIPTION
Version 1.0
General Purpose Input/Output
22
21
20
19
18
0
0
0
0
0
RO
RO
RO
RO
RO
6
5
4
3
2
PORT_DATA
0
0
0
0
0
RW
RW
RW
RW
RW
17
16
0
0
RO
RO
1
0
0
0
RW
RW
8-9

Advertisement

Table of Contents
loading

This manual is also suitable for:

Lh79525

Table of Contents