Table of Contents
Advertisement
I/O Configuration
11.2 Register Reference
This section describes the registers used in I/O configuration. In all cases, when the
MUX register is programmed its corresponding Resistor register (if it exists) must be
programmed. The Resistor registers are not automatically configured.
11.2.1 Memory Map
The base address for the IOCON is
memory map.
ADDRESS
OFFSET
0x00
0x04
0x08
0x0C
0x10
0x14
0x18
0x1C
0x20
0x24
0x28
0x2C
0x30
0x34
0x38
0x3C
0x40
0x44
0x48
0x4C
0x50
0x54
0x58
0x5C
0x60
0x64
0x68
0x6C
11-2
Table 11-1. IOCON Register Summary
NAME
MUXCTL1 Muxing Control 1 For pins from PI2/ETHERCOL to PL0/LCDVD14
RESCTL1 Resistor Control 1 Assignment for pins From PI2/ETHERCOL to PL0/LCDVD14
///
Reserved Do not access
///
Reserved Do not access
MUXCTL3 Muxing Control 3 For pin INT4/CTCLK/BATCNTL
RESCTL3 Resistor Control 3 Assignment for pin INT4/CTCLK/BATCNTL
Muxing Control 4 For PA7/CTCAP2B/CTCMP2B/SCL to PA2/CTCAP0A/
MUXCTL4
CTCMP0A
Resistor Control 4 Assignment for pins from PA7/CTCAP2B/CTCMP2B/SCL to
RESCTL4
PA2/CTCAP0A/CTCMP0A
Muxing Control 5 For pins from PA1/INT3/UARTTX2/UARTIRTX2 to
MUXCTL5
PB2/SSPFRM
Resistor Control 5 Assignment for pins from PA1/INT3/UARTTX2/UARTIRTX2
RESCTL5
to PB2/SSPFRM
Muxing Control 6 For pins from PB1/DREQ/nUARTRTS0 to
MUXCTL6
PB0/nDACK/nUARTCTS0
Resistor Control 6 Assignment for pins from PB1/DREQ/nUARTRTS0 to
RESCTL6
PB0/nDACK/nUARTCTS0
MUXCTL7 Muxing Control 7 For pins from PC7/A23 to PC0/A16
RESCTL7 Resistor Control 7 Assignment for pins from PC7/A23 to PC0/A16
///
Reserved Do not access
///
Reserved Do not access
///
Reserved Do not access
///
Reserved Do not access
MUXCTL10 Muxing Control 10 For pins from PN3/D25 to PK5/D21
RESCTL10 Resistor Control 10 Assignment for pins from PN3/D25 to PK5/D21
MUXCTL11 Muxing Control 11 For pins from PD4/D12 to PD1/D9
RESCTL11 Resistor Control 11 Assignment for pins from PD4/D12 to PD1/D9
MUXCTL12 Muxing Control 12 For pins from PK0/D16 to PD0/D8
RESCTL12 Resistor Control 12 Assignment for pins from PK0/D16 to D2
///
Reserved Do not access
RESCTL13 Resistor Control 13 Assignment for pins from D1 to D0
MUXCTL14 Muxing Control 14 For Pins Ranging From nCS3/PM3 to nBLE3/PM5
///
Reserved Do not access
Version 1.0
LH79524/LH79525 User's Guide
0xFFFE5000. Table 11-1 shows the register locations in the
DESCRIPTION
Advertisement
Table of Contents
