Table 9-12. Ichcnt Register; Table 9-13. Ichcnt Fields; Table 9-14. Iclcnt Register; Table 9-15. Iclcnt Fields - Sharp LH79524 User Manual

2
I C Module
9.2.2.5 I
The ICHCNT register allows programming the length of the serial clock HIGH time.
BIT
FIELD
RESET
TYPE
BIT
FIELD
RESET
TYPE
ADDR
BITS NAME
31:8
7:0
9.2.2.6 I
The ICLCNT register allows programming the length of the serial clock LOW time.
BIT
FIELD
RESET
TYPE
BIT
FIELD
RESET
TYPE
ADDR
BITS NAME
31:8
7:0
9-10
2
C Clock High Time Register (ICHCNT)

Table 9-12. ICHCNT Register

31 30 29 28 27
0 0 0 0
RO RO RO RO RO
15 14 13 12 11
///
0 0 0 0
RO RO RO RO RO
/// Reserved Reading returns 0. Write the reset value.
High Count This field allows programming the SCL HIGH time, in HCLK
periods. The value is a hexadecimal number. The HIGH time is ICHCNT + 3
HCNT HCLK periods in 100 kbit/s mode, and ICHCNT + 4 HCLK cycles in 400 kbit/s
mode. The ICHCNT Register must be programmed before any I
tion can take place to insure proper timing.
2
C Clock Low Time Register (ICLCNT)

Table 9-14. ICLCNT Register

31 30 29 28 27
0 0 0 0
RO RO RO RO RO
15 14 13 12 11
///
0 0 0 0
RO RO RO RO RO
/// Reserved Reading returns 0. Write the reset value.
Low Count This register allows programming the SCL LOW time, in HCLK periods.
The value is a hexadecimal number. The LOW time is ICLCNT + 3 HCLK periods in
LCNT 100 kbit/s mode, and ICLCNT + 4 HCLK cycles in 400 kbit/s mode. The ICLCNT Reg-
ister must be set before any I
Note that the value in this register must be at least 3 for proper I
26 25 24 23
///
0 0 0 0 0
RO RO RO RO
10 9 8 7
0 0 0 0 0
RO RO RO RW
0xFFFC5000 + 0x10

Table 9-13. ICHCNT Fields

DESCRIPTION
26 25 24 23
///
0 0 0 0 0
RO RO RO RO
10 9 8 7
0 0 0 0 0
RO RO RO RW
0xFFFC5000 + 0x14

Table 9-15. ICLCNT Fields

DESCRIPTION
2
C bus transaction takes place to insure proper timing.
Version 1.0
LH79524/LH79525 User's Guide
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
HCNT
0 0 0 0 0
RW RW RW RW RW
2
C bus transac-
22 21 20 19 18
0 0 0 0 0
RO RO RO RO RO
6 5 4 3 2
LCNT
0 0 0 0 0
RW RW RW RW RW
2
C operation.
17 16
0 0
RO RO
1 0
0 0
RW RW
17 16
0 0
RO RO
1 0
0 0
RW RW