External Memory Map - Sharp LH79524 User Manual

LH79524/LH79525 User's Guide

7.1.1 External Memory Map

The EMC provides hardware support for booting from external nonvolatile memory. During
boot the nonvolatile memory must be located at address 0x00000000 in memory. When
the system is booted, nCS0, nCS1, or nDCS0 can be remapped to address 0x00000000
by software. The boot device is selected at reset by the state of PC[7:4]. A boot example
later in this chapter shows these values in Table 7-2 and Table 7-3.
7.1.1.1 nCS1 Memory Configuration
The memory width and the byte lane state of static memory Chip Select 1 (nCS1) can be
configured during a power on reset using the CS10V register, described in Section 3.2.3.
7.2 Static Memory
The static memory interface is externally asynchronous. However, the LH79524/LH79525
generates the external asynchronous signals using the internal system clock to synchro-
nously control the switching. Thus, the timing of static memory signals is easily referenced
to the internal system clock frequency.
The diagrams in this chapter as well as the Data Sheet show HCLK waveforms. However,
that is simply for reference; HCLK is not transmitted on the external memory interface.
7.2.1 Static Memory Operation
The EMC increases addressing efficiency by automatically shifting the addresses output
on the external memory bus, depending on the size of memory devices being addressed.
For 8-bit memory systems, address signal A0 is connected to address pin A0. With a 16-
bit system, addressing does not require address signal A0 since accesses begin on half-
word boundaries. For 32-bit systems, both address signal A0 and A1 are not needed
because memory accesses begin on word boundaries. Byte Lane Enables should be used
for addressing individual bytes.
Figure 7-2 shows how the internal address signals are switched to the address pins. For
example, in the configuration shown in Figure 7-2, the memory device width has been set
to 32 bits by programming the SCONFIGx:MW field to 0b10. Note that this is the width of
the connected memory system, not the device. Thus, if two 16-bit memory devices are
connected as a 32-bit wide system, the MW field is programmed to 0b10 for 32 bits. If the
16-bit devices are connected as a 16-bit wide system, program MW to 0b01, and the
switches in Figure 7-2 would then move to the '01' position, which connects address signal
A1 to pin A0 and so forth. Shifting the address automatically greatly simplifies hardware
design and PC board layout. In addition, because all 23 external address lines can be used
for 16- and 32-bit systems, the number of addressable locations doubles or quadruples
(respectively) compared to memory controllers that do not shift the addresses. The EMC
allows the identical number of 8-bit, half-word, and full-word locations to be addressed with
the same external address bus.
Version 1.0
External Memory Controller
7-3