External Memory Controller
7.5.2.3 Configuration Register (CONFIG)
The CONFIG Register configures the operation of the memory controller.
This register must only be modified during system initialization, or when there are no cur-
rent or outstanding transactions. Software can ensure that there are no current or out-
standing transactions by waiting until the memory controller is idle, then entering Low-
Power Mode (CONTROL:MODE = 1), or Disable Mode (CONTROL:ENABLE = 0). When
in these two modes, external memory access is not allowed, ensuring that changing
parameters will not corrupt external data. Low-Power Mode automatically refreshes
SDRAM; Disable Mode requires commanding the SDRAM to Self Refresh (DYNMC-
TRL:SR = 1) prior to entering Disable.
BIT
FIELD
RESET
TYPE
BIT
FIELD
RESET
TYPE
ADDR
7-32
Table 7-15. CONFIG Register
31
30
29
28
27
0
0
0
0
0
RO
RO
RO
RO
RO
15
14
13
12
11
///
0
0
0
0
0
RO
RO
RO
RO
RO
Table 7-16. CONFIG Fields
BITS NAME
31:9
///
Reserved Reading returns 0. Write the reset value.
HCLK to SDCLK Ratio
8
CLK
1 = RESERVED; program to 0
0 = 1:1
7:0
///
Reserved Reading returns 0. Write the reset value.
26
25
24
23
///
0
0
0
0
RO
RO
RO
RO
10
9
8
7
CLK
0
0
0
0
RO
RO
RW
RW
0xFFFF1000 + 0x008
FUNCTION
Version 1.0
LH79524/LH79525 User's Guide
22
21
20
19
18
0
0
0
0
0
RO
RO
RO
RO
RO
6
5
4
3
2
///
0
0
0
0
0
RW
RW
RW
RW
RW
17
16
0
0
RO
RO
1
0
0
0
RW
RW